Position Description:Provides design support to multiple design engineers by creating and modifying layouts of RF, analog and mixed signal integrated circuits for wireless consumer electronic products, with an emphasis on analog BiCMOS circuit layout in Silicon. Generates tape-out data sets, and coordinates the release of mask sets with foundry personnel and designers.
Qualifications:The qualified applicant will demonstrate experience in the layout of integrated circuits including the ability to place and route active and passive devices. This includes the ability to plan the placement of major circuit components in an overall physical design and an understanding of how the physical layout can affect circuit performance of circuits like power amplifiers, switches and other devices. The applicant must have a basic understanding of both digital and analog electrical circuits, be able to read electrical schematics and netlists, and be able to perform layout vs. schematic (LVS), design rule checks (DRC), electrical rule checks (ERC), ESD and latch-up checks, and antenna rule checks using the Calibre or Assura verification tools. An understanding of semiconductor processes like Silicon BiCMOS is desirable. The successful candidate must demonstrate an ability to work and communicate well with multiple groups, such as design automation, wafer fab engineering, and design engineering. Strong organization, documentation, and computer skills are required. Knowledge of SKILL, Perl or C++ desirable but not required.